The present invention relates in general to clamping circuits and, more particularly, to a video clamping circuit for setting the signal level at an input pin of an integrated circuit to a predetermined value.
Clamping circuits are generally used to limit the voltage or current level at a particular node of interest. In television system applications, a video input signal is typically applied to one pin of an integrated circuit (IC). The video signal contains sync pulses, and reference bursts in the backporch regions, needed to decode the video information. The video signal is usually AC-coupled which causes the DC level of blanking and sync pulses to vary depending upon the average picture level (APL) of the video signal. That is, when the scene is bright, the APL is high and when the scene is dark the APL is low. To aid in reading the sync pulses and reference bursts, the DC level of the video signal should be clamped to a predetermined level at the input pin to the IC.
Many prior art clamping circuits require external capacitors to establish reference voltages to perform the clamping function. These capacitors tend to be large in order to maintain the appropriate reference voltage and therefore must be placed external to the IC. Accordingly, one or more additional pins of the IC package have to be dedicated to the reference capacitors. It is desirable to minimize pin count and associated package size needed to perform the clamping operation.
Another approach to establishing the internal reference voltage for the clamping circuit involves replacing the external capacitor with a digital-to-analog converter (DAC). An appropriate digital circuit drives the DAC to produce the needed reference voltage. However, there is considerable expense and additional complex circuitry for the DAC and its control circuit.
Hence, a need exists for a simple clamping circuit operating with a minimal number of IC pins.